darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night! (by darklife)
scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog (by syntacore)
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| darkriscv | scr1 | |
|---|---|---|
| 3 | 2 | |
| 1,630 | 645 | |
| 1.2% | 1.7% | |
| 2.8 | 0.0 | |
| 5 months ago | 6 months ago | |
| Verilog | SystemVerilog | |
| BSD 3-clause "New" or "Revised" License | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
darkriscv
Posts with mentions or reviews of darkriscv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-08-20.
- Are there any dual-GBE, PoE-capable SBCs?
-
Chinese Academy of Sciences releases "Xiangshan", a high performance open source RISC-V processor that runs Linux
Just found https://github.com/darklife/darkriscv whose (incomplete) core is surprisingly short. Which means you won't have to learn a lot. You can run it in simulator or on one of the listed fpga boards.
scr1
Posts with mentions or reviews of scr1.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-07-04.
-
Looking for a suitable open-source RISC-V for an embedded project
Would this be suitable? https://github.com/syntacore/scr1 I haven't used it, but I saw it in Riscduino project which continues to appear in Open MPWs.
What are some alternatives?
When comparing darkriscv and scr1 you can also consider the following projects:
biriscv - 32-bit Superscalar RISC-V CPU
XiangShan - Open-source high-performance RISC-V processor
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
riscv-simple-sv - A simple RISC V core for teaching
Cores-VeeR-EH1 - VeeR EH1 core
riscv - RISC-V CPU Core (RV32IM)
friscv - RISCV CPU implementation in SystemVerilog
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
meta-riscv - OpenEmbedded/Yocto layer for RISC-V Architecture
clic - RISC-V fast interrupt controller
ibex - Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.