cpu11 VS riscv

Compare cpu11 vs riscv and see what are their differences.

cpu11

Revengineered ancient PDP-11 CPUs, originals and clones (by 1801BM1)
pdp-11 Verilog Hdl Reverse Engineering cpucore Retrocomputing
Source Code
Suggest alternative
Edit details

riscv

RISC-V CPU Core (RV32IM) (by ultraembedded)
risc-v Cpu Verilog Fpga Verilator Rv32im Rv32i riscv-linux pipeline-processor Asic Verification
Source Code
Suggest alternative
Edit details
InfluxDB
Our great sponsors
  • InfluxDB - Power Real-Time Data Analytics at Scale
  • WorkOS - The modern identity platform for B2B SaaS
  • SaaSHub - Software Alternatives and Reviews
Our great sponsors
cpu11 riscv
2 2
146 1,040
- -
5.3 1.8
4 months ago over 2 years ago
Verilog Verilog
GNU General Public License v3.0 or later BSD 3-clause "New" or "Revised" License
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

cpu11

Posts with mentions or reviews of cpu11. We have used some of these posts to build our list of alternatives and similar projects.

riscv

Posts with mentions or reviews of riscv. We have used some of these posts to build our list of alternatives and similar projects.

What are some alternatives?

When comparing cpu11 and riscv you can also consider the following projects:

PDP-11 - A collection of PDP-11 related files

biriscv - 32-bit Superscalar RISC-V CPU

open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

livehd - Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation

darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

serv - SERV - The SErial RISC-V CPU

zipcpu - A small, light weight, RISC CPU soft core

hdl - HDL libraries and projects

Toast-RV32i - Pipelined RISC-V RV32I Core in Verilog

uhd - The USRP™ Hardware Driver Repository

cpu11 vs PDP-11 riscv vs biriscv cpu11 vs open-fpga-verilog-tutorial riscv vs openlane cpu11 vs livehd riscv vs darkriscv cpu11 vs serv riscv vs zipcpu cpu11 vs hdl riscv vs Toast-RV32i cpu11 vs openlane riscv vs uhd