XiangShan VS cpufetch

Are you calling for the government to pick a winner? The Chinese word for this fierce if at times chaotic competition is "juan". It worked for them in EV and PV. The outcome remains to be seen in chips and commercial space launches. But even their mostly (ex-)students-run open source Xiangshan RiscV project https://github.com/OpenXiangShan/XiangShan shows a remarkable level of sophistication.

> Certainly no RISC-V implementations that are in the hands of customers right now do any fusion and it doesn't seem to hurt their ability to match or exceed the performance of similar Arm cores (A55, A72).

You can play around with OpenXianShan though, they have a few fusion targets: https://github.com/OpenXiangShan/XiangShan/blob/master/src/m...

Most of the targets require the same destination, so it won't be able to fuse current codegen. I suppose there is still some time before compilers need to be ready, but it's not that much.

> Perhaps they will provide compiler patches if required.

I hope so, btw t-head seems to be still be trying to upstream XTheadVector: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/64278...

This is the most advanced open source risc-v implementation I'm awair of: https://github.com/OpenXiangShan/XiangShan

Maybe implement a big feature for a open source design? like vroom or xiangshan.

If you are interested in high performance look into vroom , c910 and xianghan, maybe you could adopt one of them.

Here’s a good example of one: https://github.com/OpenXiangShan/XiangShan

There are already open source designs that are reportedly close to older ARM smartphone design in term of performance (c910 and xiangshang).

> Because at this point they have more to gain than by keeping them proprietary. RISC-V is not yet overall competitive with ARM. So it's not like these RISC-V cores could be commercialized that successfully. Keeping them open probably makes further development faster.

This open source core is about equivalent to a Cortex-X1. https://github.com/OpenXiangShan/XiangShan

lscpu + neofetch = cpufetch\ (24 comments)

Interesting. Could you start a new issue (https://github.com/Dr-Noob/cpufetch/issues) with the output of cpufetch on the rpizeroW, so we can understand what is going on?

Peak performance in x86_64 is calculated using get_str_peak_performance (see https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/cpuid.c#L727). Esentially, the formula is PP = CORES * FREQUENCY * NUMBER_VPUS * 2 (If CPU has FMA) * VECTOR_WIDTH.

Since op didn't put a link to the github: https://github.com/Dr-Noob/cpufetch

Sure. You need to build it from source, have a look at https://github.com/Dr-Noob/cpufetch#21-building-from-source

https://github.com/Dr-Noob/cpufetch#cpufetch

The link I posted refers to a document explaining how cpufetch is designed, but you can go back to the main repository webpage and try it out (https://github.com/Dr-Noob/cpufetch).