Digital
iverilog
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Digital | iverilog | |
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83 | 11 | |
3,824 | 2,598 | |
- | - | |
7.0 | 9.7 | |
about 2 months ago | 15 days ago | |
Java | C++ | |
GNU General Public License v3.0 only | GNU General Public License v3.0 only |
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Digital
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How can I implement a simple asynchronous DRAM controller? (2018)
This is a tangent, but in the first question post the OP mentions considering implementing helper circuitry with quote "a GAL16V8 or something but I don't think I understand them well enough, programmers are very expensive and the programming software is closed source & Windows-only as far as I know."
I went down this path on a project a few years ago and I just wanted to point out that you can burn the fuse file for the Lattice GAL16v8 or GAL22v10 chips these days using a cheap TL866 Plus programmer...
And there is a very cool way to write the JEDEC fuse files- you can draw out the circuitry you want using the [0] Digital simulation package (it is similar to Logisim) and export a compatible bitstream to burn from there. Thus skipping the need to find a way to run the old WinCUPL or the even older DOS program that was used to do the synthesis back in the day.
Used the recommended JRT https://adoptium.net/
Wandered through the https://github.com/hneemann/Digital site and saw past issues with JRT but no obvious solution.
I have a couple hundred GALs of same or similar model number of new old stock
- Software for the arrangement of computer components on breadboards
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could someone please help me build a circuit for this truth table 🙏
The Digital application can generate a circuit based on a truth table. An example...
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Logic Gate Simulator
I cannot recommend Digital enough: https://github.com/hneemann/Digital
It is quite new. Clearly inspired by Logisim but not derived from it.
It has support for switches like FETs and relays, and you can implement open collector logic with pull-up resistors.
It can analyze and reduce combinatorial logic. It can generate Verilog and VHDL output from a diagram. And, IMO best of all, you can implement individual components in Verilog/VHDL and plop them as graphical elements in your circuit; when you simulate, it will fire up iverilog or ghdl in the background.
It's fast too; one of the demo circuits is a complete processor and it simulates it at around 300 kHz on my machine.
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How a CPU works: Bare metal C on my RISC-V toy CPU
I have been building a CPU using: https://github.com/hneemann/Digital
Much faster than Logisim, UI a little clunky, but my CPU runs around 0.5Mhz and it has very nice peripherals like Telnet, graphics ram, VGA etc
Terrible name that is hard to google, but great tool.
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Digital Logic Sim
Should you want a digital logic simulator that's not a game, check out https://github.com/hneemann/Digital.
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fpga for kids
Take a look at https://github.com/hneemann/Digital
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My new 65816 Computer, very proud!
as for designing, i used Digital to create the circuit and export it to Verilog, then Quartus II to synthese it for the MAX7000 series of CPLDs (because they are perfectly compatibile with the ATF150x series), then used POF2JED to convert the generated POF file into a JED file, which can finally be used in ATMISP to load onto the CPLD.
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I was making adder circuits in games 8 years ago in an attempt to build a computer. I finally worked my way up and built a working computer!
though i'd heavily recommend first building the circuit in a logic simulator like Logisim, or Digital before trying to build it in a game for an FPGA. (Digital even allows you to export circuits as Verilog/VHDL, and as a certified lazy person, that is very useful)
iverilog
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Trying to learn and work with FPGAs
The toolchains come with their own simulators, but there are also open source ones you can use. For Verilog you have ICARUS Verilog and Verilator. For VHDL there is GHDL.
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Open-source SystemVerilog simulation support using cocotb
This is not, in general, true. While iverilog may support some SV features, it is far from complete and does not support some very common use cases. For example, interfaces.
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Ben's 8 Bit Computer in an FPGA
I have no intention to run it on real FPGA ever, Icarus Verilog simulator suits me well enough.
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Building the 8-bit computer in software
As the idea was to make it more realistic, I started by making (hopefully accurate representation of) 74-series logic chips in Verilog. Then wired them into higher level modules, and merged those into complete CPU. Runs quite good in Icarus Verilog.
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Where do I start with RISC-V/
I'd suggest starting with simulation using Icarus Verilog or Verilator. And gtkwave to display simulation output.
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100 Languages Speedrun: Episode 28: Verilog
We'll specifically be using Icarus Verilog.
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Transition from soc Design to Design Verification?
In the open-source world, learning UVM isn't practical. There just isn't a simulator that can run it. However, if you use something like PyUVM with CocoTB, along with verilator or Icarus as an RTL simulator you code start writing test benches around some simple verilog components.
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Tools like Scitools Understand but support Verilog
https://github.com/steveicarus/iverilog (can definitely do syntax checking, but is missing some functionality for newer Verilog standards)
What are some alternatives?
logisim-evolution - Digital logic design tool and simulator
Digital-Logic-Sim
Logisim-Dark - A fork of Logisim with a Darcula-like look and feel
logisim-evolution - Digital logic designer and simulator
veridian - A SystemVerilog Language Server
slang - SystemVerilog compiler and language services
verible - Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
OpenCircuits - A free, open source, online digital circuit/logic designer.
mooc-java-programming-i - University of Helsinki’s free massive open online course (MOOC) completed exercises. 2020 solutions
customasm - 💻 An assembler for custom, user-defined instruction sets! https://hlorenzi.github.io/customasm/web/
jdh-8 - An 8-bit minicomputer with a fully custom architecture