Digital VS 8-bit-CPU

Theres the open source Digital (https://github.com/hneemann/Digital) which can run simulations but then export Verilog. If you have an ICE40 based GPU then in theory you can then use open source tools (like apio) to get that onto your FPGA. I've seen some impressive fpga tasks being generated by that.

I'm early in my learning of FPGA and have done nandgame and some other non-HDL circuit learnings. I have gone back and forth if I want to design my project via HDL or via something like Digital. There's not an easy pro/con either way.

Used the recommended JRT https://adoptium.net/

Wandered through the https://github.com/hneemann/Digital site and saw past issues with JRT but no obvious solution.

I have a couple hundred GALs of same or similar model number of new old stock

Check if https://github.com/hneemann/Digital and/or Logisim are for you.

someone posted a logic gate graph some days ago which sent me through a loop of remaking a 4bit multiplier i designed in Digital Logic, in desmos. unfortunately everything is pretty much explicitly defined and put together as to maintain only the appearance of this exact circuit, so theres no ui for placing components drawing wires and building your own circuits. yet ;]

This is my favorite book and I read it while trying to create the circuits myself before learning the chapter using digital - it's very enlightening and I recommend you do the same

Digital

The Digital application can generate a circuit based on a truth table. An example...

I later built a version that can read/store a full byte (2 key-presses) and present it to a CPU.

My code is available here, it has evolved since then and I actually abandoned the in-Arduino emulator later (re-wrote that part in Verilog). So it is best viewed at historical tag "emulator_1.0" in the repository.

Mark your data using PROGMEM directive (see example).

My project sources are on GitHub. Theres a lot going on, and it is probably a bit over-engineered. You can start by taking a look at Arduino sketch and client library.

I wrote an emulator for mine, then extended it to test out different designs, before building on hardware. The approach was a bit different, as I started by implementing 74-series logic chips. Then "wired" them together into CPU modules. This way emulator becomes a testable representation of what's possible using logic chips.

I wrote an emulator for my CPU in Verilog. Actually, I made it to test out various aspects before building, real hardware has not yet cached up with it.

The source code was in Python. I was able to debug it using Arduino-based adapter and (by using some "magic") translate into machine code binary. Since then I've switched to CustomAsm for code compilation and have other means to debug (emulator and debugger tool).

If you looking for examples: here's how you create the array (code generated using xxd -i command), and here's how you use the array.

In the beginning of program (on EEPROM), there's a small piece of code that reads all 256 address locations and writes them back. In BOOT mode, this effectively copies contents from ROM into RAM.

Complicated? Perhaps, but do not underestimate the power of automated testing! When you can run a couple dozen tests in just few seconds, at any time, it really gives you confidence about the system. Obviously, one should spend time writing the tests, but it pays back rather quickly.